K.L. Ashley
Analog Electronics with LabVIEW
Revised version. Jan. 2015
Focus is on the curve fit of the simulators to the output characteristic. Comparison is made between the Level 3 Versions of AIM Spice and LTspice (Schematics/PSpice).
The Level 3 Spice model, for both cases, used here is described in the following.
Stage 1
Stage 2
Logic 0 (Global Variable, sw) – AIM Spice – K = 1 – Logic 1 – LTspice/Schematics – K = KAPPA
Stage 3
Documentation for Level 3 Spice is in the appendix of this journal paper.
Plots are based on parameter extraction from the Philips HEF4007 CMOS chip. Curve fit to output characteristic, NMOS.
VMAX=0 – AIM Spice
AIM Spice – UCRIT = 0.9 meg
Extractor – AIM
LTspice
Plots of measured data and curve fits for the two cases.
Simulate Circuit – AIM and LabVIEW
Circuit – Borrowed from LTspice Spice Net List
LTspice and LabVIEW